| To: | Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de> |
|---|---|
| Subject: | Re: [PATCH] Further TLB handler optimizations |
| From: | Rojhalat Ibrahim <ibrahim@schenk.isar.de> |
| Date: | Mon, 10 Jan 2005 13:51:54 +0100 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <20050107190605.GG31335@rembrandt.csv.ica.uni-stuttgart.de> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20041223202526.GA2254@deprecation.cyrius.com> <20041224040051.93587.qmail@web52806.mail.yahoo.com> <20041224085645.GJ3539@rembrandt.csv.ica.uni-stuttgart.de> <20050107190605.GG31335@rembrandt.csv.ica.uni-stuttgart.de> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.7) Gecko/20040617 |
Thiemo Seufer wrote: I updated the patch now and checked it in. Please test, especially for cases I couldn't do, like R3000-style TLB handling and MIPS32 CPUs with 64bit physaddr. My Yosemite board (RM9000 processor) does not boot anymore with CONFIG_64BIT_PHYS_ADDR. Without that option it seems to be working as before. I tried to define cpu_has_64bit_gp_regs. With that it boots partly. When I also define cpu_has_64bit_addresses it stops working again. Rojhalat Ibrahim |
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