linux-mips
[Top] [All Lists]

Re: SMP on Yosemite

To: linux-mips@linux-mips.org
Subject: Re: SMP on Yosemite
From: Rojhalat Ibrahim <ibrahim@schenk.isar.de>
Date: Wed, 05 Jan 2005 08:50:33 +0100
In-reply-to: <20050104155651.GB12031@gw.junsun.net>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <41DA6A13.7090703@schenk.isar.de> <20050104155651.GB12031@gw.junsun.net>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.7) Gecko/20040617
Jun Sun wrote:
In earlier version time.c file, I introduced something like "smp_emulate_local_timer" variable. When it is set, cpu 0 sends
"EMULATE_LOCAL_TIMER" IPI to other CPUs.  Sending IPI is done
inside timer_interrupt().

I think that is a better approach, where implementation can be shared
by other SMP machines.

I would just rename RESCHEDULE_YOURSELF to EMULATE_LOCAL_TIMER.

Jun


Ok. Second try. Attached is the revised patch.



Index: smp.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips/smp.h,v
retrieving revision 1.31
diff -u -r1.31 smp.h
--- smp.h       26 Nov 2004 10:06:36 -0000      1.31
+++ smp.h       5 Jan 2005 07:46:31 -0000
@@ -46,6 +46,7 @@

 #define SMP_RESCHEDULE_YOURSELF        0x1     /* XXX braindead */
 #define SMP_CALL_FUNCTION      0x2
+#define SMP_EMULATE_LOCAL_TIMER 0x3

 extern cpumask_t phys_cpu_present_map;
 extern cpumask_t cpu_online_map;

Index: setup.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/pmc-sierra/yosemite/setup.c,v
retrieving revision 1.12
diff -u -r1.12 setup.c
--- setup.c     19 Dec 2004 02:38:44 -0000      1.12
+++ setup.c     5 Jan 2005 07:45:48 -0000
@@ -127,8 +127,22 @@
        return 0;
 }
 
+irqreturn_t yosemite_timer_interrupt(int irq, void *dev_id, struct pt_regs 
*regs)
+{
+#ifdef CONFIG_SMP
+       int cpu = smp_processor_id();
+       
+       if (ocd_base) {
+          if (cpu == 0) core_send_ipi(1,SMP_EMULATE_LOCAL_TIMER);
+          else core_send_ipi(0,SMP_EMULATE_LOCAL_TIMER);
+       }
+#endif
+       return timer_interrupt(irq,dev_id,regs);
+}
+
 void yosemite_timer_setup(struct irqaction *irq)
 {
+       irq->handler = yosemite_timer_interrupt;
        setup_irq(7, irq);
 }
 
@@ -136,13 +150,13 @@
 {
        board_timer_setup = yosemite_timer_setup;
        mips_hpt_frequency = cpu_clock / 2;
-mips_hpt_frequency = 33000000 * 3 * 5;
+       mips_hpt_frequency = 100000000 * 5;
 }
 
 /* No other usable initialization hook than this ...  */
 extern void (*late_time_init)(void);
 
-unsigned long ocd_base;
+unsigned long ocd_base = 0;
 
 EXPORT_SYMBOL(ocd_base);
 
Index: smp.c
===================================================================
RCS file: /home/cvs/linux/arch/mips/pmc-sierra/yosemite/smp.c,v
retrieving revision 1.11
diff -u -r1.11 smp.c
--- smp.c       15 Dec 2004 20:04:59 -0000      1.11
+++ smp.c       5 Jan 2005 07:45:48 -0000
@@ -1,5 +1,6 @@
 #include <linux/linkage.h>
 #include <linux/sched.h>
+#include <linux/interrupt.h>
 
 #include <asm/pmon.h>
 #include <asm/titan_dep.h>
@@ -7,6 +8,8 @@
 extern unsigned int (*mips_hpt_read)(void);
 extern void (*mips_hpt_init)(unsigned int);
 
+extern void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs);
+
 #define LAUNCHSTACK_SIZE 256
 
 static spinlock_t launch_lock __initdata;
@@ -122,10 +125,10 @@
 {
 }
 
-asmlinkage void titan_mailbox_irq(struct pt_regs *regs)
+asmlinkage void titan_mailbox_irq(int irq, struct pt_regs *regs)
 {
        int cpu = smp_processor_id();
-       unsigned long status;
+       unsigned long status = 0;
 
        if (cpu == 0) {
                status = OCD_READ(RM9000x2_OCD_INTP0STATUS3);
@@ -139,6 +142,13 @@
 
        if (status & 0x2)
                smp_call_function_interrupt();
+       
+       if (status & 0x8)
+       {
+               irq_enter();
+               local_timer_interrupt(irq, NULL, regs);
+               irq_exit();
+       }
 }
 
 /*
@@ -168,5 +178,11 @@
                else
                        OCD_WRITE(RM9000x2_OCD_INTP0SET3, 2);
                break;
+       case SMP_EMULATE_LOCAL_TIMER:
+               if (cpu == 1)
+                       OCD_WRITE(RM9000x2_OCD_INTP1SET3, 8);
+               else
+                       OCD_WRITE(RM9000x2_OCD_INTP0SET3, 8);
+               break;
        }
 }
<Prev in Thread] Current Thread [Next in Thread>