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Re: [PATCH] Avoid compile warnings on Sibyte using 2.6.10-rc3

To: Manish Lachwani <mlachwani@mvista.com>
Subject: Re: [PATCH] Avoid compile warnings on Sibyte using 2.6.10-rc3
From: "Steven J. Hill" <sjhill@realitydiluted.com>
Date: Wed, 15 Dec 2004 21:49:15 -0600
Cc: linux-mips@linux-mips.org
In-reply-to: <41C100CB.2070000@mvista.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20041215235632.GA11386@prometheus.mvista.com> <41C0FCFD.9010603@realitydiluted.com> <41C100CB.2070000@mvista.com>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.7.3) Gecko/20041007 Debian/1.7.3-5
Manish Lachwani wrote:

When did you last sync with CVS? There was a change introduced :
Literally 10 minutes ago and I did a fresh compile.

And if running Sibyte in UP mode, cpu_icache_snoops_remote_store is redefined

I do not run in UP mode, so that is why I did not see it. I suggest
a different version attached. How does that work for you?

-Steve

Index: cpu-features.h
===================================================================
RCS file: /home/cvs/linux/include/asm-mips/cpu-features.h,v
retrieving revision 1.9
diff -u -r1.9 cpu-features.h
--- cpu-features.h      7 Dec 2004 02:08:34 -0000       1.9
+++ cpu-features.h      16 Dec 2004 03:42:03 -0000
@@ -87,13 +87,13 @@
  * that did the store so we can't optimize this into only doing the flush on
  * the local CPU.
  */
-#ifdef CONFIG_SMP
 #ifndef cpu_icache_snoops_remote_store
+#ifdef CONFIG_SMP
 #define cpu_icache_snoops_remote_store (cpu_data[0].icache.flags & 
MIPS_IC_SNOOPS_REMOTE)
-#endif
 #else
 #define cpu_icache_snoops_remote_store 1
 #endif
+#endif
 
 /*
  * Certain CPUs may throw bizarre exceptions if not the whole cacheline
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