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Re: HIGHMEM

To: ralf@linux-mips.org
Subject: Re: HIGHMEM
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Mon, 13 Dec 2004 13:34:09 +0900 (JST)
Cc: nunoe@co-nss.co.jp, linux-mips@linux-mips.org
In-reply-to: <20041207095837.GA13264@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <001101c4dbf9$1da02270$3ca06096@NUNOE> <20041207095837.GA13264@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
>>>>> On Tue, 7 Dec 2004 10:58:37 +0100, Ralf Baechle <ralf@linux-mips.org> 
>>>>> said:
ralf> Issue #3 - As I recall the TX4937's H3 core is suffering from
ralf> cache aliases.  Handling those efficiently for highmem is not
ralf> easily possible and so we don't even try.  More recent kernels
ralf> will refuse to enable highmem on such cache configurations but
ralf> something like 2.4.18 which by now is an almost 3 year old
ralf> antique doesn't know about that and will happily crash.

ralf> I recommend you should go for a 64-bit kernel instead.  And
ralf> 64-bit support is certainly better in 2.6 than in 2.4.
ralf> Especially the area of 32-bit binary compatibility has been
ralf> improved significantly.

And this is a small step to a 64-bit kernel for TX49XX.  Could you
apply?

--- linux-mips/arch/mips/mm/Makefile    2004-12-13 09:39:09.000000000 +0900
+++ linux/arch/mips/mm/Makefile 2004-12-13 09:52:54.000000000 +0900
@@ -49,6 +49,7 @@
 endif
 ifdef CONFIG_MIPS64
 obj-$(CONFIG_CPU_R4300)                += tlbex64.o
+obj-$(CONFIG_CPU_TX49XX)       += tlbex64.o
 obj-$(CONFIG_CPU_R4X00)                += tlbex64.o
 obj-$(CONFIG_CPU_R5000)                += tlbex64.o
 obj-$(CONFIG_CPU_NEVADA)       += tlbex64.o

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