Hi Ralf,
Based on your suggestion, I have now modified the Ocelot-3 code
to probe for memory that has been configured by PMON. Please review ...
Thanks
Manish Lachwani
Index: linux/arch/mips/momentum/ocelot_3/prom.c
===================================================================
--- linux.orig/arch/mips/momentum/ocelot_3/prom.c
+++ linux/arch/mips/momentum/ocelot_3/prom.c
@@ -34,6 +34,7 @@
struct callvectors* debug_vectors;
extern unsigned long marvell_base;
extern unsigned long cpu_clock;
+extern unsigned long memsize;
#ifdef CONFIG_MV643XX_ETH
extern unsigned char prom_mac_addr_base[6];
@@ -194,6 +195,11 @@
NULL, 10);
printk("cpu_clock set to %d\n", cpu_clock);
}
+ if (strncmp("memsize", ptr, strlen("memsize")) == 0) {
+ memsize = simple_strtol(ptr + strlen("memsize="),
+ NULL, 10);
+ }
+
i++;
}
printk("arcs_cmdline: %s\n", arcs_cmdline);
@@ -222,6 +228,10 @@
cpu_clock = simple_strtol(*env + strlen("cpuclock="),
NULL, 10);
}
+ if (strncmp("memsize", *env, strlen("memsize")) == 0) {
+ memsize = simple_strtol(*env + strlen("memsize="),
+ NULL, 10);
+ }
env++;
}
#endif /* CONFIG_MIPS64 */
Index: linux/arch/mips/momentum/ocelot_3/setup.c
===================================================================
--- linux.orig/arch/mips/momentum/ocelot_3/setup.c
+++ linux/arch/mips/momentum/ocelot_3/setup.c
@@ -77,6 +77,9 @@
/* CPU clock */
unsigned long cpu_clock;
+/* Memory size */
+unsigned long memsize;
+
/* RTC/NVRAM */
unsigned char* rtc_base = (unsigned char*)(signed)0xfc800000;
@@ -390,8 +393,8 @@
printk(" - Boot flash write jumper: %s\n",
(tmpword&0x40)?"installed":"absent");
printk(" - L3 cache size: %d MB\n", (1<<((tmpword&12) >> 2))&~1);
- /* Support for 256 MB memory */
- add_memory_region(0x0, 0x10000000, BOOT_MEM_RAM);
+ /* Support for memory configured by PMON*/
+ add_memory_region(0x0, memsize * 1024 * 1024, BOOT_MEM_RAM);
return 0;
}
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