linux-mips
[Top] [All Lists]

Re: [PATCH] Improve atomic.h implementation robustness

To: Dominic Sweetman <dom@mips.com>
Subject: Re: [PATCH] Improve atomic.h implementation robustness
From: Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de>
Date: Wed, 1 Dec 2004 21:45:36 +0100
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org, Nigel Stephens <nigel@mips.com>, David Ung <davidu@mips.com>
In-reply-to: <16813.39660.948092.328493@doms-laptop.algor.co.uk>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20041201070014.GG3225@rembrandt.csv.ica.uni-stuttgart.de> <16813.39660.948092.328493@doms-laptop.algor.co.uk>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.5.6i
Dominic Sweetman wrote:
> 
> Thiemo writes:
> 
> > the atomic functions use so far memory references for the inline
> > assembler to access the semaphore. This can lead to additional
> > instructions in the ll/sc loop, because newer compilers don't
> > expand the memory reference any more but leave it to the assembler.
> > 
> > The appended patch...
> 
> I thought it was an explicit aim of the substantial rewrite of the
> MIPS backend for 3.x to get the compiler to generate only "real"
> instructions, not macros which expand to multiple instructions inside
> the assembler.  So it's disappointing if newer compilers got worse.

The compiler was improved with PIC code in mind. The kernel is
non-PIC, and can't allow explicit relocs by the compiler because
of the weird code model used for 64bit kernels. This led to some
degradation and even subtle failures for inline assembly code which
relies on assumptions about earlier compiler's behaviour.


Thiemo

<Prev in Thread] Current Thread [Next in Thread>