| To: | Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de> |
|---|---|
| Subject: | Re: [PATCH] Improve atomic.h implementation robustness |
| From: | Dominic Sweetman <dom@mips.com> |
| Date: | Wed, 1 Dec 2004 10:20:28 +0000 |
| Cc: | linux-mips@linux-mips.org, ralf@linux-mips.org |
| Cc: | Nigel Stephens <nigel@mips.com>, David Ung <davidu@mips.com> |
| In-reply-to: | <20041201070014.GG3225@rembrandt.csv.ica.uni-stuttgart.de> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20041201070014.GG3225@rembrandt.csv.ica.uni-stuttgart.de> |
| Sender: | linux-mips-bounce@linux-mips.org |
Thiemo writes: > the atomic functions use so far memory references for the inline > assembler to access the semaphore. This can lead to additional > instructions in the ll/sc loop, because newer compilers don't > expand the memory reference any more but leave it to the assembler. > > The appended patch... I thought it was an explicit aim of the substantial rewrite of the MIPS backend for 3.x to get the compiler to generate only "real" instructions, not macros which expand to multiple instructions inside the assembler. So it's disappointing if newer compilers got worse. Can one of our compiler-knowledgable people follow this up? -- Dominic Sweetman MIPS Technologies |
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