Re: [PATCH] Synthesize TLB refill handler at runtime

[Ralf Baechle <ralf@linux-mips.org>]

On Wed, Nov 24, 2004 at 02:40:57AM +0100, Thiemo Seufer wrote:

> >     default:
> >             /*
> >              * Others are assumed to have one cycle mtc0 hazard,
> > -            * and one cycle tlbwr hazard.
> > +            * and one cycle tlbwr hazard or to understand ehb.
> >              * XXX: This might be overly general.
> >              */
> > -           i_nop(p);
> > +           i_ehb(p);
> >             i_tlbwr(p);
> > -           i_nop(p);
> > +           i_ehb(p);
> >             break;
> 
> Does r24k really need both delays? If not, it should get its own case.
> Probably it should be separated even if it is identical, the code above
> is nothing but a guess based on preexisting code.

I would suggest to default to EHB only for architecture revision 2.  For
any pre-V2 processor the outcome of a default case is basically luck and
so I would suggest to just panic and force people to read their CPU
manual.

  Ralf