| To: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
|---|---|
| Subject: | Re: [PATCH]Preemption patch for 2.6 |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Sun, 24 Oct 2004 17:41:49 +0200 |
| Cc: | mlachwani@mvista.com, linux-mips@linux-mips.org |
| In-reply-to: | <20041025.002850.74755987.anemo@mba.ocn.ne.jp> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1098468403.4266.42.camel@prometheus.mvista.com> <20041025.002850.74755987.anemo@mba.ocn.ne.jp> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.1i |
On Mon, Oct 25, 2004 at 12:28:50AM +0900, Atsushi Nemoto wrote: > mlachwani> The attached patch incorporates preemption enable/disable > mlachwani> in some parts of the kernel. I have tested this on the > mlachwani> Broadcom Sibyte. Please review ... > > 1. You add preempt_disable/preempt_enable to c-sb1.c and tlb-sb1.c. > Those are SB1 specific issue? If not, please fix other c-*.c and > tlb-*.c same way. This an SMP issue and only affects the SB1 code. The other CPU for which CVS supports SMP is the R10000 family; thanks to having nice caches it's immune mostly immune to this kind of issue. Ralf |
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