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Re: yosemite interrupt setup

To: linux-mips@linux-mips.org
Subject: Re: yosemite interrupt setup
From: Thomas Koeller <thomas.koeller@baslerweb.com>
Date: Thu, 21 Oct 2004 11:49:35 +0200
Cc: Manish Lachwani <mlachwani@mvista.com>
In-reply-to: <4176AACA.3000206@mvista.com>
Organization: Basler AG
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References: <200410201952.29205.thomas.koeller@baslerweb.com> <4176A855.1000907@mvista.com> <4176AACA.3000206@mvista.com>
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On Wednesday 20 October 2004 20:13, Manish Lachwani wrote:

>         TITAN_GE_WRITE(0x0024, 0x04000024);    /* IRQ vector */
>         TITAN_GE_WRITE(0x0020, 0x000fb000);    /* INTMSG base */

Hi Manish,

it was the location of these two lines that I was asking for. So they
are in the ethernet driver. Wouldn't you agree that they should go
into the platform instead? The interrrupt is shared with
other devices, the DUART to name just one example, and if I want to
write a driver for these, then that driver would depend on the
ethernet driver, if that does the interrupt setup.

So this covers the message interrupts, but I also have not been
able so far to spot the location where the corresponding setup
is done for the external interrupt lines, that is, setting up
the INTPINx registers. Any hints?

thank you,
Thomas

-- 
--------------------------------------------------

Thomas Koeller, Software Development
Basler Vision Technologies

thomas dot koeller at baslerweb dot com
http://www.baslerweb.com

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