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Re: PATCH

To: Geert Uytterhoeven <geert@linux-m68k.org>
Subject: Re: PATCH
From: "Maciej W. Rozycki" <macro@linux-mips.org>
Date: Sun, 10 Oct 2004 20:11:48 +0100 (BST)
Cc: Pete Popov <ppopov@embeddedalley.com>, "linux-mips@linux-mips.org" <linux-mips@linux-mips.org>
In-reply-to: <Pine.GSO.4.61.0410102000530.5826@waterleaf.sonytel.be>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1097428659.4627.10.camel@localhost.localdomain> <Pine.GSO.4.61.0410102000530.5826@waterleaf.sonytel.be>
Sender: linux-mips-bounce@linux-mips.org
On Sun, 10 Oct 2004, Geert Uytterhoeven wrote:

> > Ralf, or anyone else, any suggestions on how to get a patch like the one
> > below accepted in 2.6? It's needed due to the 36 bit address of the
> > pcmcia controller on the Au1x CPUs.
> 
> Perhaps you can ask the PPC people? Book E PPC has 36-bit I/O as well.

 Using 36-bit pointers for PCMCIA seems questionable to me -- does the bus
support such wide addresses?  If not, why not use a data type that covers
valid offsets only when passing addresses to bus access functions?  In
particular, the range of offsets (the data type used) shouldn't depend on
the processor type, should it?

  Maciej

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