On Mon, Aug 23, 2004 at 01:44:47PM -0400, Daniel Jacobowitz wrote:
> Personally, I favor doing the low-overhead syscall for o32 and then
> moving to the new ABI that MIPS is talking about with a thread
I was always wondering how far gcc could optimize code to minimize this
special system call. After all on Alpha something similar PAL-code based
was the method of choice.
> I'm not sure what to do about n32/n64.
I believe N32 / N64 are not widespead enough yet to be a big roadblock
for moving to new ABIs. Whoever disagress should better speak up soon :-)
If we deciede to move to something entirely different than the existing
ABIs in the future will be able to support compatibility the same way
we're already doing.
> > Other crazy ideas did include a per-thread mapping containing the thread
> > pointer - and possibly more information in the future.
> Does MIPS have an efficient way to do this for SMP?
It can be done making the TLB fault for that page about as expensive as
a null syscall.
> > On the positive side if we had multiple register sets on a MIPSxx V2
> > processor we could exploit that to get rid of this overheade and do
> > other nice optimizations for TLB reload also. Unfortunately these
> > register sets are optional feature of the architecture only.
> That's more or less what was talked about for ARM v6.
I'm unARMed here ;-)