| To: | gcc-patches@gcc.gnu.org |
|---|---|
| Subject: | Re: [patch] MIPS/gcc: Revert removal of DImode shifts for 32-bit targets |
| From: | Paul Brook <paul@codesourcery.com> |
| Date: | Wed, 11 Aug 2004 01:40:03 +0100 |
| Cc: | Richard Henderson <rth@redhat.com>, Richard Sandiford <rsandifo@redhat.com>, "Maciej W. Rozycki" <macro@linux-mips.org>, Nigel Stephens <nigel@mips.com>, linux-mips@linux-mips.org |
| In-reply-to: | <20040810232020.GA21922@redhat.com> |
| Organization: | CodeSourcery |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <Pine.LNX.4.58L.0407261325470.3873@blysk.ds.pg.gda.pl> <87zn5336h7.fsf@redhat.com> <20040810232020.GA21922@redhat.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | KMail/1.6.2 |
On Wednesday 11 August 2004 00:20, Richard Henderson wrote: > On Tue, Aug 10, 2004 at 06:30:28AM +0100, Richard Sandiford wrote: > > The whole thing's in a sequence that gets discarded if > > expand_doubleword_shift returns false. Isn't that enough? > > Missed that, sorry. > > Patch seems ok then. We'd have to add a new macro/target flag > to handle non-truncating shifts -- we've got cases: > > (1) Large shift shifts out all bits (ARM) ARM is actually shift count modulo 256 Paul |
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