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Re: TLS register

To: Guido Guenther <agx@sigxcpu.org>
Subject: Re: TLS register
From: "Steven J. Hill" <sjhill@realitydiluted.com>
Date: Mon, 31 May 2004 22:17:41 -0500
Cc: linux-mips@linux-mips.org, debian-toolchain@lists.debian.org
In-reply-to: <20040531230524.GB2785@bogon.ms20.nix>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20040531230524.GB2785@bogon.ms20.nix>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.6) Gecko/20040528 Debian/1.6-7
Guido Guenther wrote:

He suggested $24 (t8) another discussed possibility would be $27 (k1)
which is already abused by the PS/2 folks for ll/sc emulation.
Another possibility would be to reserve such a register only in the
n32/n64 ABIs and let o32 stay without __thread and TLS forever.
Any feedback welcome.

I vote for $24 (t8). LL/SC emulation is an issue and I believe some of
the exception vectors, if not all of them indirectly depend on k1. It
would take a lot of work (and testing) to rewrite the exceptions to not
utilize k1 and it would probably be a nasty performance hit in many
cases. I agree with "Screw o32" and let's move forward.

-Steve

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