| To: | Emmanuel Michon <em@realmagic.fr> |
|---|---|
| Subject: | Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bit arithmetics? |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Thu, 27 May 2004 17:59:47 +0200 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <1085668313.20233.1249.camel@avalon.france.sdesigns.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1085589315.2306.49.camel@avalon.france.sdesigns.com> <20040526203346.GA8430@linux-mips.org> <1085668313.20233.1249.camel@avalon.france.sdesigns.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.1i |
On Thu, May 27, 2004 at 04:31:53PM +0200, Emmanuel Michon wrote: > On 64bit you substract 1ULL<<32 > > Substracting 1 is enough for it to be algorithmically correct even on > 64bit > Do you accept a patch with the version for CONFIG_LLSC = y using a > substraction by 1? This sounds wrong - the current algorithm is manipulating two 32-bit variables held in a single register. If you change the algorithm like this you will manipulate the wrong variable. Anyway, I don't see why the code fails for you. With CONFIG_CPU_HAS_LLSC set and CONFIG_CPU_HAS_LLDSCD disabled it should just work for you. The suggestion in my prevous mail was meant for a rewrite along the lines of for example ppc64 - an algorithm that's mostly C and almost portable even. Ralf |
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