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Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bit arithm

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bit arithmetics?
From: Emmanuel Michon <em@realmagic.fr>
Date: 27 May 2004 16:31:53 +0200
Cc: linux-mips@linux-mips.org
In-reply-to: <20040526203346.GA8430@linux-mips.org>
Organization: REALmagic France SAS
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <1085589315.2306.49.camel@avalon.france.sdesigns.com> <20040526203346.GA8430@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
On Wed, 2004-05-26 at 22:33, Ralf Baechle wrote:
> On Wed, May 26, 2004 at 06:35:16PM +0200, Emmanuel Michon wrote:
> 
> Semaphores can be implemented using just a single 32-bit variable which
> would mean the same code could be used for 32-bit and 64-bit processors
> as long as only they support ll/sc.  Maybe somebody has the time at his
> hands, *hint*, *hint* :-)
> 
>   Ralf

On 64bit you substract 1ULL<<32

Substracting 1 is enough for it to be algorithmically correct even on
64bit

Do you accept a patch with the version for CONFIG_LLSC = y using a
substraction by 1?

Sincerely yours,

E.M.


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