| To: | Emmanuel Michon <em@realmagic.fr> |
|---|---|
| Subject: | Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bitarithmetics? |
| From: | "Maciej W. Rozycki" <macro@ds2.pg.gda.pl> |
| Date: | Wed, 26 May 2004 19:16:49 +0200 (CEST) |
| Cc: | "Kevin D. Kissell" <kevink@mips.com>, linux-mips@linux-mips.org |
| In-reply-to: | <1085591018.2306.82.camel@avalon.france.sdesigns.com> |
| Organization: | Technical University of Gdansk |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1085589315.2306.49.camel@avalon.france.sdesigns.com> <012b01c44342$c3ec91e0$10eca8c0@grendel> <1085591018.2306.82.camel@avalon.france.sdesigns.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Wed, 26 May 2004, Emmanuel Michon wrote: > No, because this choice of CPU CONFIG_MIPS32 > is exclusive with CONFIG_CPU_R3000 and CONFIG_CPU_R4X00 > > I do use CONFIG_CPU_R4X00 so that appropriate cache routines are used Well, the cache routines for both CONFIG_CPU_R4X00 and CONFIG_MIPS32 are the same. > I'd prefer to find the appropriate combination of flags to get things > right though... The defaults for CONFIG_MIPS32 should be OK. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + |
| Previous by Date: | Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bitarithmetics?, Emmanuel Michon |
|---|---|
| Next by Date: | Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bitarithmetics?, Emmanuel Michon |
| Previous by Thread: | Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bitarithmetics?, Emmanuel Michon |
| Next by Thread: | Re: down_trylock() implementation for MIPS 4KEc CPU implies 64bitarithmetics?, Emmanuel Michon |
| Indexes: | [Date] [Thread] [Top] [All Lists] |