On Mon, 2004-05-10 at 16:53, Stanislaw Skowronek wrote:
> > Q2- Most hardware platforms have their SDRAM chips mapped at
> > physical address 0x0. Mine does not. Am I going ahead of problems?
> > It seems to be assumed at a lot of places (I have already ported YAMON).
> I have run into very few problems of the sort on the Octane, which has all
> its memory just over CKSEG0. Most, if not all, of them would be gone if
> the Octane had anything at all in CKSEG0, not counting exception vectors
> (that reminds me, how do you handle exceptions? Linux assumes you *DO*
> have some writeable space at CKSEG0, at least a kilobyte - all exception
> handlers are copied there at runtime).
It seems not all MIPS CPUs have the CP0 register EBase but mine does
This one allows to use any value as exception base instead of
0x8000_0000 (that saves me: I will just point it at the base of my RAM).
> You will have to change the kernel link address to the beginning of your
> physical RAM (or any other place you like, as long as it is under 512MB).
> It is easily done and I don't think it will cause any problems.
> Stanislaw Skowronek