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Re: semaphore woes in 2.6, 32bit

To: ralf@linux-mips.org
Subject: Re: semaphore woes in 2.6, 32bit
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Sun, 09 May 2004 22:56:37 +0900 (JST)
Cc: geert@linux-m68k.org, jsun@mvista.com, linux-mips@linux-mips.org
In-reply-to: <20040509125750.GA19225@linux-mips.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20040508224806.A24682@mvista.com> <Pine.GSO.4.58.0405091108150.26985@waterleaf.sonytel.be> <20040509125750.GA19225@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
>>>>> On Sun, 9 May 2004 14:57:50 +0200, Ralf Baechle <ralf@linux-mips.org> 
>>>>> said:

ralf> We got tripped by a change in 2.6.6-rc2.  Before that change the
ralf> kmalloc slab caches were being created with SLAB_HWCACHE_ALIGN
ralf> which results in L1_CACHE_SHIFT alignment for allocations of
ralf> L1_CACHE_SHIFT for slab caches that are at least that size.  For
ralf> the sake of S390 this behaviour was changed; new it defaults to
ralf> BYTES_PER_WORD alignment which is four bytes.

ralf> Fixed by defining ARCH_KMALLOC_MINALIGN as 8.

Hmm, many drivers use kmalloc and pci_map_single for DMA buffer.  So
ARCH_KMALLOC_MINALIGN should be L1_CACHE_BYTES for non-coherent
system?

---
Atsushi Nemoto

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