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Re: pci-ip27 memory ranges

To: Stanislaw Skowronek <sskowron@ET.PUT.Poznan.PL>
Subject: Re: pci-ip27 memory ranges
From: Christoph Hellwig <hch@lst.de>
Date: Sat, 24 Apr 2004 12:30:04 +0200
Cc: linux-mips@linux-mips.org
In-reply-to: <Pine.GSO.4.10.10404241059030.18252-100000@helios.et.put.poznan.pl>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <Pine.GSO.4.10.10404241059030.18252-100000@helios.et.put.poznan.pl>
Sender: linux-mips-bounce@linux-mips.org
User-agent: Mutt/1.3.28i
On Sat, Apr 24, 2004 at 11:00:44AM +0200, Stanislaw Skowronek wrote:
> Why does the pci-ip27 driver register all memory resources (0UL - ~0UL)?

The current PCI support for IP27 is more or less a huge hack.  I plan to
hack it up to do the right thing based on the IRIX code for it released
by SGI, but it'll take a bit because that code isn't exactly readable
and my time is rather limited.


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