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Re: 32-bit ABI

To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Subject: Re: 32-bit ABI
From: Ralf Baechle <ralf@linux-mips.org>
Date: Sat, 24 Apr 2004 10:18:54 +0200
Cc: Stanislaw Skowronek <sskowron@ET.PUT.Poznan.PL>, linux-mips@linux-mips.org
In-reply-to: <Pine.LNX.4.55.0404240959200.14494@jurand.ds.pg.gda.pl>
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On Sat, Apr 24, 2004 at 10:07:02AM +0200, Maciej W. Rozycki wrote:

> > > > Yeah. The weirdness is not in that part; what's weird is placing the 
> > > > rest
> > > > of memory somewhere else.
> > > 
> > >  Perhaps to be able to put iomem stuff in CKSEG1 without implying a hole
> > > in the RAM.
> > 
> > The machine is running a 64-bit kernel so likely it was designed with
> > little consideration for 32-bit issues.
> 
>  Well, the exception arrangement requires RAM starting from the physical
> address 0.  It seems natural to place RAM just there, avoiding additional
> complexity to address decoders.  But then firmware has to be somewere
> around 0x1fc00000, so to support more than 508MB of RAM the designers
> would have to create a hole in RAM, which would have to be handled by the
> OS then.  Thus abandoning the idea of putting RAM low, placing it
> somewhere above 0x1fffffff and just mapping some of it at 0 for the
> exceptions seems a better solution.
> 
>  Fortunately everything is not a PC. :-)

Actually the R10000 way to do something like this is to use the uncached
attribute like in the Origin.  It allows using the same physical address
space several times for different purposes.  So on node 0 of an Origin
indeed memory starts at physical address zero and there is no hole for
the firmware.  IP27 is afaik the only system using this R10000 feature
which surprises me a little due to the otherwise great similarity of these
two systems.

  Ralf

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