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Re: 32-bit ABI

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: 32-bit ABI
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Date: Sat, 24 Apr 2004 10:07:02 +0200 (CEST)
Cc: Stanislaw Skowronek <sskowron@ET.PUT.Poznan.PL>, linux-mips@linux-mips.org
In-reply-to: <20040424075545.GA27039@linux-mips.org>
Organization: Technical University of Gdansk
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <Pine.GSO.4.10.10404240945500.14182-100000@helios.et.put.poznan.pl> <Pine.LNX.4.55.0404240949350.14494@jurand.ds.pg.gda.pl> <20040424075545.GA27039@linux-mips.org>
Sender: linux-mips-bounce@linux-mips.org
On Sat, 24 Apr 2004, Ralf Baechle wrote:

> > > Yeah. The weirdness is not in that part; what's weird is placing the rest
> > > of memory somewhere else.
> > 
> >  Perhaps to be able to put iomem stuff in CKSEG1 without implying a hole
> > in the RAM.
> 
> The machine is running a 64-bit kernel so likely it was designed with
> little consideration for 32-bit issues.

 Well, the exception arrangement requires RAM starting from the physical
address 0.  It seems natural to place RAM just there, avoiding additional
complexity to address decoders.  But then firmware has to be somewere
around 0x1fc00000, so to support more than 508MB of RAM the designers
would have to create a hole in RAM, which would have to be handled by the
OS then.  Thus abandoning the idea of putting RAM low, placing it
somewhere above 0x1fffffff and just mapping some of it at 0 for the
exceptions seems a better solution.

 Fortunately everything is not a PC. :-)

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

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