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Re: [RFC] Separate time support for using cpu timer

To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Subject: Re: [RFC] Separate time support for using cpu timer
From: Jun Sun <jsun@mvista.com>
Date: Tue, 20 Apr 2004 16:25:00 -0700
Cc: linux-mips@linux-mips.org, jsun@mvista.com
In-reply-to: <Pine.LNX.4.55.0404201522220.28193@jurand.ds.pg.gda.pl>; from macro@ds2.pg.gda.pl on Tue, Apr 20, 2004 at 03:41:32PM +0200
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On Tue, Apr 20, 2004 at 03:41:32PM +0200, Maciej W. Rozycki wrote:
> On Mon, 19 Apr 2004, Jun Sun wrote:
> 
> > Solution
> > --------
> > 
> > All the boards that I am really concerned right now have cpu count/compare
> > registers.  I believe this will even more so in the future.
> > 
> > Therefore I like to propose a separate time support for systems that use
> > cpu timer as their system timer.
> > 
> > As you can see from the patch, the new code is much simpler.
> 
>  It makes it separate again -- more maintenance burden and a bigger
> opportunity to have functional divergence, sigh...
> 

Pretty much true for lots of improvement we made in the past a couple of
years .... :)

>  Additionally I don't think using the CP0 Count & Compare registers for
> the system timer is the way to go.  It's rather a way to escape when
> there's no other possibility.  A lot of systems have a reliable external
> timer interrupt source and using it actually would free the CP0 registers
> for other uses, like profiling or a programmable interval timer.
> 

I was rather neutral on this point until I started to add HRT/VST support to 
MIPS.  When adding such features you really just want one common timer code.
And the best choice for MIPS is cpu timer.

BTW, I plan to submit MIPS/HRT support based on the cpu-timer patch.  Hopefully 
this will catch more attention to the cpu timer patch....

Jun

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