| To: | pdh@colonel-panic.org |
|---|---|
| Subject: | Re: missing flush_dcache_page call in 2.4 kernel |
| From: | Atsushi Nemoto <anemo@mba.ocn.ne.jp> |
| Date: | Tue, 30 Mar 2004 15:38:43 +0900 (JST) |
| Cc: | phorton@bitbox.co.uk, linux-mips@linux-mips.org |
| In-reply-to: | <20040328130400.GA28177@skeleton-jack> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20040326184317.GA3661@skeleton-jack> <20040327.224952.74755860.anemo@mba.ocn.ne.jp> <20040328130400.GA28177@skeleton-jack> |
| Sender: | linux-mips-bounce@linux-mips.org |
>>>>> On Sun, 28 Mar 2004 14:04:00 +0100, Peter Horton <pdh@colonel-panic.org> >>>>> said: pdh> I've ditched the original Cobalt hack in c-r4k.c, and am using pdh> the patch below instead. Seems to work okay ... + for (; addr < (void *) end; addr += PAGE_SIZE) + flush_data_cache_page((unsigned long) addr); dma_cache_wback() will be more efficient ? Also, I personally think replacing all insb/insw/insl is a bit overkill. I'd prefer redefine insb/insw/insl in asm-mips/ide.h, but I'm not sure it is enough. (really all ins[bwl] should take care of the cache inconsistency?) --- Atsushi Nemoto |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | Re: BUG in pcnet32.c?, Steven J. Hill |
|---|---|
| Next by Date: | mips-linux cross-compiler, Ronen Shitrit |
| Previous by Thread: | Re: missing flush_dcache_page call in 2.4 kernel, Peter Horton |
| Next by Thread: | Re: missing flush_dcache_page call in 2.4 kernel, Peter Horton |
| Indexes: | [Date] [Thread] [Top] [All Lists] |