| To: | Lijun Chen <chenli@nortelnetworks.com> |
|---|---|
| Subject: | Re: NMI handling in MIPS64 |
| From: | Jun Sun <jsun@mvista.com> |
| Date: | Mon, 29 Mar 2004 17:26:12 -0800 |
| Cc: | linux-mips@linux-mips.org, jsun@mvista.com |
| In-reply-to: | <4068B3A4.4000204@americasm01.nt.com>; from chenli@nortelnetworks.com on Mon, Mar 29, 2004 at 06:39:16PM -0500 |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <4068B3A4.4000204@americasm01.nt.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.2.5i |
On Mon, Mar 29, 2004 at 06:39:16PM -0500, Lijun Chen wrote: > Hi, > > I noticed there is a NMI handler in mips32 kernel tree > (arch/mips/kernel/head.S and traps.c). > But there is not a counterpart in mips64. Do we need one? Personally I don't see much need of this. Even if firmware redirect NMI to the linux handler, you would die anyway. > >From Ralf's earlier emails, the execution of NMI will pass through the > >firmware. Does that > mean just the firmware handles the NMI? Yes. > And if the NMI can be enabled/disabled? The NMI on CPU can't be disabled. Of course you can always have extra PIC in front of the NMI signal and you are free to enable/disable there. Jun |
| <Prev in Thread] | Current Thread | [Next in Thread> |
|---|---|---|
| ||
| Previous by Date: | Re: BUG in pcnet32.c?, Ralf Baechle |
|---|---|
| Next by Date: | Re: BUG in pcnet32.c?, Steven J. Hill |
| Previous by Thread: | NMI handling in MIPS64, Lijun Chen |
| Next by Thread: | mips-linux cross-compiler, Ronen Shitrit |
| Indexes: | [Date] [Thread] [Top] [All Lists] |