Re: gcc support of mips32 release 2

[Dominic Sweetman <dom@mips.com>]

Maciej,

> > The 'di' is there to be atomic...
> 
>  Hmm, is the remaining minority of the OSes, that can't manage the
> sequence, important enough to add such an instruction?

Perhaps not.  The case I always suggest is that of a serial port
transmit interrupt handler, which often wants to disable the TxReady
interrupt when it finds there's no more data to send.  There's almost
always a way to do that without changing the SR interrupt mask, of
course... 

--
Dominic