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Re: gcc support of mips32 release 2

To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Subject: Re: gcc support of mips32 release 2
From: Dominic Sweetman <dom@mips.com>
Date: Mon, 22 Mar 2004 14:49:52 +0000
Cc: Dominic Sweetman <dom@mips.com>, Eric Christopher <echristo@redhat.com>, Long Li <long21st@yahoo.com>, linux-mips@linux-mips.org, David Ung <davidu@mips.com>, Nigel Stephens <nigel@mips.com>
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Maciej,

> > The 'di' is there to be atomic...
> 
>  Hmm, is the remaining minority of the OSes, that can't manage the
> sequence, important enough to add such an instruction?

Perhaps not.  The case I always suggest is that of a serial port
transmit interrupt handler, which often wants to disable the TxReady
interrupt when it finds there's no more data to send.  There's almost
always a way to do that without changing the SR interrupt mask, of
course... 

--
Dominic


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