| To: | "Maciej W. Rozycki" <macro@ds2.pg.gda.pl> |
|---|---|
| Subject: | Re: gcc support of mips32 release 2 |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Thu, 18 Mar 2004 22:37:13 +0100 |
| Cc: | Dominic Sweetman <dom@mips.com>, Eric Christopher <echristo@redhat.com>, Long Li <long21st@yahoo.com>, linux-mips@linux-mips.org, David Ung <davidu@mips.com>, Nigel Stephens <nigel@mips.com> |
| In-reply-to: | <Pine.LNX.4.55.0403181404210.5750@jurand.ds.pg.gda.pl> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20040305075517.42647.qmail@web40404.mail.yahoo.com> <1078478086.4308.14.camel@dzur.sfbay.redhat.com> <16456.21112.570245.1011@arsenal.mips.com> <Pine.LNX.4.55.0403181404210.5750@jurand.ds.pg.gda.pl> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.1i |
On Thu, Mar 18, 2004 at 02:18:01PM +0100, Maciej W. Rozycki wrote:
> As a side note, it makes me wonder where the borderline of the RISC
> actually is. Even Intel abandoned support for bit insert/extract
> instructions after an initial attempt for the i386. They figured out the
> implementation was too complicated. ;-)
Take a look at the 68020 to see where instruction set madness can lead:
movel ([42, a0, d0.2*2],123), ([43, a0, d0.2*2], 22)
bfextu ([42, a0, d0.2*2],123){8:8}, d2
And I haven't even started bitching about CALLM's bloat over jsr on a
system with MMU disabled or the fantastic complexities it offers with
all gadgets enabled. Probably desigend for MACH but in the end just
useless no known OS used them and Moto removed them again for the 030.
Ralf
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