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Re: gcc support of mips32 release 2

To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Subject: Re: gcc support of mips32 release 2
From: Michael Uhler <uhler@mips.com>
Date: 18 Mar 2004 08:52:48 -0800
Cc: Dominic Sweetman <dom@mips.com>, Eric Christopher <echristo@redhat.com>, Long Li <long21st@yahoo.com>, linux-mips@linux-mips.org, David Ung <davidu@mips.com>, Nigel Stephens <nigel@mips.com>
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Dominic already gave the long explanation.

When we added field insert and extract, we were very sensitive to the
implementability of the instructions.  If you look at the semantic
definition, independent of the somewhat complex explanation, you'll
find that both insert and extract can be implemented with a
left or right shift, followed by a mux-per-bit which selects between
the shifted operand or the unshifted operand.  That can be done
very efficiently in hardware.

/gmu

On Thu, 2004-03-18 at 05:18, Maciej W. Rozycki wrote:
> On Fri, 5 Mar 2004, Dominic Sweetman wrote:
> 
> > We added patterns to let our (old) GCC use the new rotates and
> > bit-insert/extracts, at least in simple cases.  I'm not sure whether
> > we've put those in our 3.4 evolution tree yet, but if we have we
> > should push those out.
> 
>  As a side note, it makes me wonder where the borderline of the RISC
> actually is.  Even Intel abandoned support for bit insert/extract
> instructions after an initial attempt for the i386.  They figured out the
> implementation was too complicated. ;-)
> 
> -- 
> +  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
> +--------------------------------------------------------------+
> +        e-mail: macro@ds2.pg.gda.pl, PGP key available        +
> 
-- 
Michael Uhler, Chief Technology Officer
MIPS Technologies, Inc.  Email: uhler@mips.com
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