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Re: gcc support of mips32 release 2

To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Subject: Re: gcc support of mips32 release 2
From: Dominic Sweetman <dom@mips.com>
Date: Thu, 18 Mar 2004 14:10:35 +0000
Cc: Dominic Sweetman <dom@mips.com>, Eric Christopher <echristo@redhat.com>, Long Li <long21st@yahoo.com>, linux-mips@linux-mips.org, David Ung <davidu@mips.com>, Nigel Stephens <nigel@mips.com>
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Maciej W. Rozycki (macro@ds2.pg.gda.pl) writes:
> 
> > We added patterns to let our (old) GCC use the new rotates and
> > bit-insert/extracts, at least in simple cases.  I'm not sure whether
> > we've put those in our 3.4 evolution tree yet, but if we have we
> > should push those out.
> 
>  As a side note, it makes me wonder where the borderline of the RISC
> actually is.  Even Intel abandoned support for bit insert/extract
> instructions after an initial attempt for the i386.  They figured out the
> implementation was too complicated. ;-)

It probably was... but MIPS uses register-to-register ALU operations
and no condition codes.  The interface to the ALU is typically rather
simple.  So adding some peculiar new 2- or 3-operand computation is
relatively easy.

If the instruction is too complicated, of course, it might eventually
become a critical path and make the whole CPU slower.  But
insert/extract - while elaborate to describe - involve only fairly
shallow logic.

Remember: the point of RISC was never to have less instructions
(that's just a cute acronym) - the point was and is to define an
instruction set which is easy to implement as an efficient pipeline.

Of course, instructions still have to be *useful* to be added.
Insert/extract make a reasonable case for themselves, but actually
arrived in MIPS32 release 2 as part of a bunch of other bit-shuffle
instructions (also includes rotates and various byte-swaps) which -
together - help quite a bit to manipulate sub-word data in registers.

--
Dominic Sweetman
MIPS Technologies

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