| To: | Eric Christopher <echristo@redhat.com>, cgd@broadcom.com |
|---|---|
| Subject: | Re: gcc support for mips32 release 2] |
| From: | "Maciej W. Rozycki" <macro@ds2.pg.gda.pl> |
| Date: | Wed, 17 Mar 2004 17:18:37 +0100 (CET) |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <1078525778.3353.2.camel@dzur.sfbay.redhat.com> |
| Organization: | Technical University of Gdansk |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <1078525778.3353.2.camel@dzur.sfbay.redhat.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Fri, 5 Mar 2004, Eric Christopher wrote: > > If anybody knows of a MIPS64 release 2 implementation, I also have > > support for GCC to do that. (Problem is, the way the GCC MIPS > > back-end currently is, it really wants a processor implementation > > before a new ISA is added.) Well, I think this can be handled by creating an artificial processor entry (e.g. "PROCESSOR_MIPS64R2" in this case) and replacing it with a real one once an implementation is publicly available. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + |
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