| To: | karthikeyan natarajan <karthik_96cse@yahoo.com> |
|---|---|
| Subject: | Re: Doubt in updating the cache.. |
| From: | Dominic Sweetman <dom@mips.com> |
| Date: | Thu, 26 Feb 2004 12:00:13 +0000 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <20040226104929.3711.qmail@web10102.mail.yahoo.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20040226104929.3711.qmail@web10102.mail.yahoo.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
Karthi, > When the Instruction/data is read from memory, > it's copy will be put into the cache. > > Question: > > How does the R4k processor determines whether the > value read from memory is Instruction or Data so that > the value will be put into the appropriate primary > cache? The caches are not prescient... Data is only ever put into the cache when the CPU *uses* it (and it isn't there already). If the CPU was do ingan instruction fetch, the copy of the memory data goes in the I-cache; if the CPU was trying to do a load it goes in the D-cache. -- Dominic |
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