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question about memory constraint in atomic_add

To: linux-mips@linux-mips.org
Subject: question about memory constraint in atomic_add
From: Indigodfw <indigodfw@yahoo.com>
Date: Sat, 14 Feb 2004 07:11:52 -0800 (PST)
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Hello Gurus

Question from a mips new-bie

127 extern __inline__ void atomic_add(int i, atomic_t
* v)
128 {
129         unsigned long temp;
130 
131         __asm__ __volatile__(
132                 "1:   ll      %0, %1      #
atomic_add\n"
133                 "     addu    %0, %2              
   \n"
134                 "     sc      %0, %1              
   \n"
135                 "     beqz    %0, 1b              
   \n"
136                 : "=&r" (temp), "=m" (v->counter)
137                 : "Ir" (i), "m" (v->counter));
138 }

Now I look at the input operand  v->counter
We want two things :

1. Hint the compiler that memory at (v->counter) is
modified.

2. Result of (C expression) should go into %xyz
register 
So v->counter goes into %1, IOW ll from an int!

Does not make sense to me.
Why does it work, What am I missing?

I mean in general what is the expression for a m
constraint ptr (because I want ptr to be in regiser)
or *ptr (because I wanna tell compiler that *ptr is
what gets changed) 

I hope you include me in reply as I am not subscribed
to this list. Is there anyway to check this mailing
list online

Thanks and regards



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