| To: | Ralf Baechle <ralf@linux-mips.org> |
|---|---|
| Subject: | Re: CVS Update@-mips.org: linux |
| From: | "Maciej W. Rozycki" <macro@ds2.pg.gda.pl> |
| Date: | Tue, 3 Feb 2004 17:04:44 +0100 (CET) |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <20040203154935.GB1018@linux-mips.org> |
| Organization: | Technical University of Gdansk |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20040202141939Z8225226-9616+1555@linux-mips.org> <Pine.LNX.4.55.0402021611490.6182@jurand.ds.pg.gda.pl> <20040202152307.GB28673@linux-mips.org> <Pine.LNX.4.55.0402031612100.16076@jurand.ds.pg.gda.pl> <20040203154935.GB1018@linux-mips.org> |
| Sender: | linux-mips-bounce@linux-mips.org |
On Tue, 3 Feb 2004, Ralf Baechle wrote: > I don't know details but since the person who answered my question was > directly working on the CPU design I have to take that as authoritative > information and after all, the systems seems stable. OK then. > Daring a guess, the CPU restarts the pipeline following an eret therefore > instructions preceeding the eret can't cause the problem. That's possible. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + |
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