Re: CVS Update@-mips.org: linux

[Ralf Baechle <ralf@linux-mips.org>]

On Mon, Feb 02, 2004 at 04:13:28PM +0100, Maciej W. Rozycki wrote:

> >     PMC-Sierra says that the workaround for errata #18 of the R4600 V1.7
> >     and a similar erratum in V2.0 don't require disabling of interrupts,
> >     so remove that code.
> 
>  How do we assure tails of interrupt handlers don't trigger the errata?

The problem can only be triggered if instructions surrounding the
cacheop use the dcache; exceptions such as interrupts are not relevant.

Which I'm really happy about.  Disabling interrupts is a problem in cases
were we can't avoid page faults.

  Ralf