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Clock interrupt simulation on sde-gdb

To: linux-mips@linux-mips.org
Subject: Clock interrupt simulation on sde-gdb
From: navin <navgrex@cyberspace.org>
Date: Tue, 27 Jan 2004 07:49:13 -0500 (EST)
Cc: navgrex@cyberspace.org
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Hi,

I am new to MIPS. So please don't mind if this is a trivial question.

I am trying to run microC/OS-II over MIPS 4KE. At this point of time, 
as there is no hardware available. I am trying to test my code using
sde-gdb simulator.

For proper task scheduling, etc, microC/OS-II needs to get periodic
interrupt from MIPS. I understand the possible implementation of such
facility in MIPS (i.e. using Count and Compare registers of CP0).

On trying to test microC/OS-II, I find that HW5 interrupt is not getting
generated. I verified by dumping value of a global variable which would
get updated in the timer expiry function. As a result task scheduling is
not happening.

As such my bootup code seems to be configuring thigs (Count, Compare, and
Status registers) properly. Is it that such timer interrupt CAN'T BE 
SIMULATED on sde-gdb? I have tried trace32 simulator software 
(demo version) also.

Any help will be highly appreciated,

Regards,
Navin



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