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Re: Doubt in timer interrupt

To: karthikeyan natarajan <>
Subject: Re: Doubt in timer interrupt
From: Dominic Sweetman <>
Date: Fri, 23 Jan 2004 08:18:54 +0000
Cc: Dominic Sweetman <>,
In-reply-to: <>
Original-recipient: rfc822;
References: <> <>

>     May i know the purpose of the NMI interrupt and
> in what way it differ from the timer interrupt.

On MIPS CPUs the NMI is a sort of second-class reset.  You could use
it for debugging and the kind of last-ditch everything-is-dead
watchdog interrupt you might use in a high-availability system.

Most systems don't connect it to anything.

It's not for use for regular device interrupts at all.


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