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Re: Doubt in timer interrupt

To: karthikeyan natarajan <karthik_96cse@yahoo.com>
Subject: Re: Doubt in timer interrupt
From: Matthew Dharm <mdharm@momenco.com>
Date: Wed, 21 Jan 2004 23:41:38 -0800
Cc: linux-mips@linux-mips.org
In-reply-to: <20040122072407.11156.qmail@web10102.mail.yahoo.com>; from karthik_96cse@yahoo.com on Thu, Jan 22, 2004 at 07:24:07AM +0000
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As with any timer interrupt, if you mask it too long you'll lose time.

Generally, masking interrupts via the IE bit is a bad idea.

Matt

On Thu, Jan 22, 2004 at 07:24:07AM +0000, karthikeyan natarajan wrote:
> Hi All,
> 
>   In R4000 & descendent processors, interrupt number 7
> is being used for internal timer interrupt. From this
> i understand that the timer interrupt is also maskable
> when the IE bit in status register is cleared. If 
> somebody mask this interrupt for a long time 
> erroneously, then won't there be a problem in 
> maintaining the system time?
>     Please correct me if i am wrong..
> 
> Does the system time is maintained via NMI?
>    
> Thanks in advance,
> -karthi
> 
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Matthew Dharm                              Work: mdharm@momenco.com
Senior Software Designer, Momentum Computer


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