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Re: [BUG] 2.6.1/MIPS - missing cache flushing when user program returns

To: Andrew Morton <akpm@osdl.org>
Subject: Re: [BUG] 2.6.1/MIPS - missing cache flushing when user program returns pages to kernel
From: Jun Sun <jsun@mvista.com>
Date: Wed, 14 Jan 2004 17:40:12 -0800
Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, rmk@arm.linux.org.uk, jsun@mvista.com
In-reply-to: <20040114172946.03e54706.akpm@osdl.org>; from akpm@osdl.org on Wed, Jan 14, 2004 at 05:29:46PM -0800
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20040114163920.E13471@mvista.com> <20040114171252.4d873c51.akpm@osdl.org> <20040114172946.03e54706.akpm@osdl.org>
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On Wed, Jan 14, 2004 at 05:29:46PM -0800, Andrew Morton wrote:
> Andrew Morton <akpm@osdl.org> wrote:
> >
> > I think that's wrong, really.  We've discussed this before and decided that
> > these flushing operations should be open-coded in the main .c file rather
> > than embedded in arch functions which happen to undocumentedly do other
> > stuff.
> 
> err, OK, I give up.  Lots of architectures do the cache flush in
> tlb_start_vma().  I guess mips may as well do the same.
> 

Looking at my tree (which is from linux-mips.org), it appears
arm, sparc, sparc64, and sh have tlb_start_vma() defined to call
cache flushing.

What exactly does tlb_start_vma()/tlb_end_vma() mean?  There is
only one invocation instance, which is significant enough to infer
the meaning.  :)
 
BTW, either my original hack or putting a cache flush in tlb_start_vma()
solves my problem.  They are really doing the same thing, just at
different places. 

Jun

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