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Re: [BUG] 2.6.1/MIPS - missing cache flushing when user program returns

To: jsun@mvista.com, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, rmk@arm.linux.org.uk
Subject: Re: [BUG] 2.6.1/MIPS - missing cache flushing when user program returns pages to kernel
From: Andrew Morton <akpm@osdl.org>
Date: Wed, 14 Jan 2004 17:29:46 -0800
In-reply-to: <20040114171252.4d873c51.akpm@osdl.org>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20040114163920.E13471@mvista.com> <20040114171252.4d873c51.akpm@osdl.org>
Sender: linux-mips-bounce@linux-mips.org
Andrew Morton <akpm@osdl.org> wrote:
>
> I think that's wrong, really.  We've discussed this before and decided that
> these flushing operations should be open-coded in the main .c file rather
> than embedded in arch functions which happen to undocumentedly do other
> stuff.

err, OK, I give up.  Lots of architectures do the cache flush in
tlb_start_vma().  I guess mips may as well do the same.


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