linux-mips
[Top] [All Lists]

Re: does CP0_CAUSE gets set by spurious interrupts..?.

To: "ashish anand" <ashish_ibm@rediffmail.com>
Subject: Re: does CP0_CAUSE gets set by spurious interrupts..?.
From: Dominic Sweetman <dom@mips.com>
Date: Fri, 14 Nov 2003 11:21:45 +0000
Cc: linux-mips@linux-mips.org
In-reply-to: <20031114084606.23062.qmail@webmail29.rediffmail.com>
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20031114084606.23062.qmail@webmail29.rediffmail.com>
Sender: linux-mips-bounce@linux-mips.org
Ashish,

> would a spurious interrupt ( edge vs. level trigger mismatching)
> cause CP0_CAUSE to show any pending interupts.?

CP0_CAUSE reflects the real-time inputs to the CPU, not the state of
those inputs at the time the interrupt was detected, nor is it
sensitive to the "mask" bits in the status register.

So it's perfectly possible to find no active bits in CP0_CAUSE which
account for your interrupt.  But it does all depend how your interrupt
controller works...

--
Dominic Sweetman
MIPS Technologies



<Prev in Thread] Current Thread [Next in Thread>