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BCM1250 Current Descriptor

To: <linux-mips@linux-mips.org>
Subject: BCM1250 Current Descriptor
From: "Gilad Benjamini" <gilad@riverhead.com>
Date: Tue, 28 Oct 2003 22:16:36 +0200
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
Thread-index: AcOdkGMjX+RMYiGcSQKYE4MQLpBX/g==
Thread-topic: BCM1250 Current Descriptor
Hi,
I have a question which is specific for the BCM1250. I hope this
is the right forum to ask this, if not, my apologies.
 
In an RX DMA channel the BCM1250 signals a received packet
by turning on the SOP bit. When a packet arrives, the current_descriptor
register also updates to the next packet.
Could there be a (non-trivial) time gap between the update of those ?
We see a scenario where the SOP bit is on, but the descriptor count
shows that the packet still belongs to the DMA. How can this be ?
 
TIA
 
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