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Re: 64 bit operations w/32 bit kernel

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: 64 bit operations w/32 bit kernel
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Date: Wed, 1 Oct 2003 05:58:16 +0200 (MET DST)
Cc: "Finney, Steve" <Steve.Finney@SpirentCom.COM>, linux-mips@linux-mips.org
In-reply-to: <20030930184755.GA12599@linux-mips.org>
Organization: Technical University of Gdansk
Original-recipient: rfc822;linux-mips@linux-mips.org
Sender: linux-mips-bounce@linux-mips.org
On Tue, 30 Sep 2003, Ralf Baechle wrote:

> What I called a bug is the necessity to access hardware registers with
> 64-bit loads and stores in some systems as opposed to of 32-bit
> instructions - that simply doesn't work from 32-bit universes.
> 
> To clarify, it was my understanding of Steve's problem he needs 64-bit
> loads and stores, not something in the 64-bit physical address space.
> The later problem obviously would get a different answer.

 I must have missed the detail.  Well, if 64-bit transfers are needed,
then going for the 64-bit kernel is about the only way.  Or, as a wild
hack, perhaps "ldc1" and "sdc1" can be used, if it's known the FP is
present.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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