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Re: 64 bit operations w/32 bit kernel

To: "Finney, Steve" <Steve.Finney@spirentcom.com>
Subject: Re: 64 bit operations w/32 bit kernel
From: Michael Uhler <uhler@mips.com>
Date: 29 Sep 2003 12:01:54 -0700
Cc: linux-mips@linux-mips.org
In-reply-to: <DC1BF43A8FAE654DA6B3FB7836DD3A56DEB75C@iris.adtech-inc.com>
Organization: MIPS Technologies, Inc.
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <DC1BF43A8FAE654DA6B3FB7836DD3A56DEB75C@iris.adtech-inc.com>
Sender: linux-mips-bounce@linux-mips.org
On Mon, 2003-09-29 at 10:31, Finney, Steve wrote:
> What would be the downside to enabling 64 bit operations in user space on a 
> 32 bit kernel (setting the PX bit in the status register?). The particular 
> issue is that I want to access 64 bit-memory mapped registers, and I really 
> need to do it as an atomic operation. I tried borrowing sibyte/64bit.h from 
> the kernel, but I get an illegal instruction on the double ops.
> 
The most glaring problem is you violate the rule that the 64-bit GPRs
are sign-extended when running a 32-bit binary.  There are all kinds
of assumptions in the hardware and software that depend on the
GPRs being sign-extended, and to violate this will risk some
serious instability of the software.

> Also, assuming this isn't a horrible idea, is there any obvious single place 
> where "default" values in the CP0 status register get set?
> 
> Thanks,
> sf
-- 

Michael Uhler, Chief Technology Officer
MIPS Technologies, Inc.  Email: uhler@mips.com  Pager:uhler_p@mips.com
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