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Re: GCCFLAGS for gcc 3.3.x (-march and _MIPS_ISA)

To: linux-mips@linux-mips.org
Subject: Re: GCCFLAGS for gcc 3.3.x (-march and _MIPS_ISA)
From: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Date: Tue, 12 Aug 2003 19:06:36 +0900 (JST)
In-reply-to: <20030812065118.GD23104@rembrandt.csv.ica.uni-stuttgart.de>
Organization: TOSHIBA Personal Computer System Corporation
Original-recipient: rfc822;linux-mips@linux-mips.org
References: <20030812.152654.74756131.nemoto@toshiba-tops.co.jp> <20030812065118.GD23104@rembrandt.csv.ica.uni-stuttgart.de>
Sender: linux-mips-bounce@linux-mips.org
>>>>> On Tue, 12 Aug 2003 08:51:18 +0200, Thiemo Seufer 
>>>>> <ica2_ts@csv.ica.uni-stuttgart.de> said:
>> The option -march=r4600 seems to make gcc 3.3.x choose
>> MIPS_ISA_MIPS3.

Thiemo> Which is ok, because the available ISA has little to do with
Thiemo> the actually used register width.

Thiemo> If the intention is to use mfc0 for 32bit kernels and dmfc0
Thiemo> for 64bit, the check should probably be

Thiemo> #ifdef __mips64
Thiemo> # define MFC0           dmfc0
Thiemo> # define MTC0           dmtc0
Thiemo> #else
Thiemo> # define MFC0           mfc0
Thiemo> # define MTC0           mtc0
Thiemo> #endif

Thanks for your explanations.  Perhaps the code should be fixed is
__BUILD_clear_ade in entry.S, but I'm not sure.  Does anybody know why
__BUILD_clear_ade uses MFC0 and REG_S though other parts using mfc0
and sw ?

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