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Re: RM7k cache_flush_sigtramp

To: Fuxin Zhang <fxzhang@ict.ac.cn>
Subject: Re: RM7k cache_flush_sigtramp
From: Ralf Baechle <ralf@linux-mips.org>
Date: Sat, 2 Aug 2003 19:02:46 +0200
Cc: Dominic Sweetman <dom@mips.com>, Adam Kiepul <Adam_Kiepul@pmc-sierra.com>, linux-mips@linux-mips.org
In-reply-to: <3F2A76CA.4080904@ict.ac.cn>
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On Fri, Aug 01, 2003 at 10:18:50PM +0800, Fuxin Zhang wrote:

> I just run a fresh new 2.4.21 kernel on my board, no luck.  The problem 
> remains.  But I notice that my hardware may have some problems,
> especially with the add-on ide card. Keep headaching...
> 
> As to the discussion of SYNC, I can't help wondering whether the cache 
> management should be totally hidden from programmers. People tends to
> write "safetest" code because of all kinds of brain-damage different
> hardware, which leads to inefficient code. And this will cancel out the
> potential speed benefit of simpler hardware. Also today's hardware seems
> not as expensive as it was before...

Cache managment needs to be somehow hidden from programmers as well as
possible - the average programmer has no clue about how caches work.
We've come up with an API that hides the actual functioning of caches
pretty well for DMA devices, see Documentation/DMA-mapping.txt and in
2.6 also a more generalized version documented in Documentation/DMA-API.txt.

  Ralf

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