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Re: Malta + USB on 2.4, anyone?

To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Subject: Re: Malta + USB on 2.4, anyone?
From: Jun Sun <jsun@mvista.com>
Date: Thu, 31 Jul 2003 11:15:06 -0700
Cc: linux-mips@linux-mips.org, jsun@mvista.com
In-reply-to: <20030731103629.D14914@mvista.com>; from jsun@mvista.com on Thu, Jul 31, 2003 at 10:36:29AM -0700
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References: <20030730191219.A14914@mvista.com> <Pine.GSO.3.96.1030731121705.17497D-100000@delta.ds2.pg.gda.pl> <20030731103629.D14914@mvista.com>
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On Thu, Jul 31, 2003 at 10:36:29AM -0700, Jun Sun wrote:
> On Thu, Jul 31, 2003 at 12:26:44PM +0200, Maciej W. Rozycki wrote:
> > On Wed, 30 Jul 2003, Jun Sun wrote:
> > 
> > > Has anybody tried USB on malta with 2.4 kernel?  I just found that
> > > I got 0xff IRQ number and kernel panics.
> > 
> >  Possibly IRQ routing is broken -- the PIIX4 uses INTD for its USB
> > controller's interrupt.  For the Malta it should be routed to the IRQ11
> > input of the PIIX4's internal dual-8259A PIC.  What does `/sbin/lspci -vv
> > -s 00:0a.2' print?
> >
> 
> The output seems to say the same thing:
> 
> root@10.0.18.6:~# lspci -vv -s 00:0a.2                                        
>   
> 00:0a.2 USB Controller: Intel Corporation 82371AB PIIX4 USB (rev 01) (prog-if 
> 00
>  [UHCI])                                                                      
>   
>         Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
> Step
> ping- SERR- FastB2B-                                                          
>   
>         Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
> <TAbort
> - <MAbort- >SERR- <PERR-                                                      
>   
>         Latency: 32                                                           
>   
>         Interrupt: pin D routed to IRQ 11                                     
>   
>         Region 4: I/O ports at 1220 [size=32]                                 
>   
> 

Using the alternative JE driver sovles the problem.  

I suspect the main UHCI driver does not get cache flushing
or bus/virt address right.


Jun

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