On Mon, Jun 30, 2003 at 02:46:41PM -0700, Vince Bridgers wrote:
> Has anyone used the Au1x00 performance event counter
> register in CP0 (Register 25 - where it says AMD will
> provide a list of the valid units and events when you
> ask them) ?
> Are they the same as some other MIPS processor that
> defines the events in their databook?
The MIPS32 spec to which the Au1x00 complies defines the structure and
interface of performance counters. It does not define which events
the counters count. Some non-MIPS32/64 processors also have slightly
different performance counter implementations. The R10000 and R12000
performance counters values are pretty similar.