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Re: [RFC] synchronized CPU count registers on SMP machines

To: "Kevin D. Kissell" <kevink@mips.com>
Subject: Re: [RFC] synchronized CPU count registers on SMP machines
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Date: Thu, 5 Jun 2003 13:08:19 +0200 (MET DST)
Cc: Jun Sun <jsun@mvista.com>, Ralf Baechle <ralf@linux-mips.org>, linux-mips@linux-mips.org
In-reply-to: <019201c32b40$2d54cf60$10eca8c0@grendel>
Organization: Technical University of Gdansk
Original-recipient: rfc822;linux-mips@linux-mips.org
Reply-to: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Sender: linux-mips-bounce@linux-mips.org
On Thu, 5 Jun 2003, Kevin D. Kissell wrote:

> > > > 1) clocks on different CPUs don't have the same frequency
> > > > 2) clocks on different CPUs drift to each other
> > > > 2) some fancy power saving feature such as frequency scaling
> > > > 
> > > > But I think for a foreseeable future most MIPS SMP machines
> > > > don't have the above issues (true?).  And it is probably worthwile
> > > > to synchronize count registers for them.
> > > 
> > > 1) and 2) affect most SGI systems.
> > >
> > 
> > Assuming SGI systems represent the past of MIPS, we are still ok
> > future-wise. :)
> 
> I personally think it would be foolish to assume that future MIPS 
> MP systems will not be subject to one or more such constraint.

 Depending on the system in use it may be easier to get a suitable
external clock reference, e.g. a chipset timer.  If an access to it would
be slow, it could be cached on timer interrupts and extended with
processors' timers.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +


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