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Re: [RFC] synchronized CPU count registers on SMP machines

To: Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [RFC] synchronized CPU count registers on SMP machines
From: Jun Sun <jsun@mvista.com>
Date: Wed, 4 Jun 2003 18:38:36 -0700
Cc: linux-mips@linux-mips.org, jsun@mvista.com
In-reply-to: <20030605001232.GA5626@linux-mips.org>; from ralf@linux-mips.org on Thu, Jun 05, 2003 at 02:12:32AM +0200
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On Thu, Jun 05, 2003 at 02:12:32AM +0200, Ralf Baechle wrote:
> On Wed, Jun 04, 2003 at 04:46:52PM -0700, Jun Sun wrote:
> 
> > Assuming SGI systems represent the past of MIPS, we are still ok
> > future-wise. :)
> 
> You loose.  The reasons why SGI did construct their systems that way are
> still valid.  It can be quite tricky to distribute the clock in large
> systems - even for a moderate definition of large.  And for ccNUMAs which
> are going to show up on the embedded market sooner or later it's easy
> for the lazy designer to use several clock sources anyway.  Note our
> current time code for will not work properly if clocks diverge on the
> slightest bit - among other things the standards mandate time to
> monotonically increase.
>

Aside from aficionado of SGI legacy, do you see any value in
implementing this just for the applicable SMP systems?

Here is my take:

To implement an efficient and correct time management in SMP
is a hard problem.  I don't think there is a generic solution
here.  (Convince me if I am wrong.)

Therefore for a set of "conforming" SMP systems which don't
have the listed 3 issues, we provide a feasible solution.
I don't see how we can avoid this - unless we don't care about
getting time right.

Jun

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