| To: | Jun Sun <jsun@mvista.com> |
|---|---|
| Subject: | Re: [RFC] synchronized CPU count registers on SMP machines |
| From: | Ralf Baechle <ralf@linux-mips.org> |
| Date: | Thu, 5 Jun 2003 02:12:32 +0200 |
| Cc: | linux-mips@linux-mips.org |
| In-reply-to: | <20030604164652.J19122@mvista.com> |
| Original-recipient: | rfc822;linux-mips@linux-mips.org |
| References: | <20030604153930.H19122@mvista.com> <20030604231547.GA22410@linux-mips.org> <20030604164652.J19122@mvista.com> |
| Sender: | linux-mips-bounce@linux-mips.org |
| User-agent: | Mutt/1.4.1i |
On Wed, Jun 04, 2003 at 04:46:52PM -0700, Jun Sun wrote: > Assuming SGI systems represent the past of MIPS, we are still ok > future-wise. :) You loose. The reasons why SGI did construct their systems that way are still valid. It can be quite tricky to distribute the clock in large systems - even for a moderate definition of large. And for ccNUMAs which are going to show up on the embedded market sooner or later it's easy for the lazy designer to use several clock sources anyway. Note our current time code for will not work properly if clocks diverge on the slightest bit - among other things the standards mandate time to monotonically increase. Ralf |
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